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AMD's Barcelona architecture - July update - Core architecture improvements&heading=Barcelona architecture July update Print E-mail
Written by Hanners   
Tuesday, 31 July 2007 01:00
Article Index
AMD's Barcelona architecture - July update
Core architecture improvements&heading=Barcelona architecture July update
Memory controller, virtualisation
Power consumption, conclusions
- Core architecture improvements 

The above image outlines pretty perfectly AMD's line for 'Barcelona' - As they see it, this range of CPUs is all about working 'smart'.  This should also give you a decent idea as to where the rest of this presentation is going, so let's crack on with a look at each of these four key sections.

Core architecture improvements

Click for full-size image

Although Barcelona is still based around the same K8 core that graced AMD's Athlon64 series of CPUs and the like, there are still a myriad of changes that have been made to these new parts, as highlighted above.  Let's take this opportunity to take a look through them all to give us an idea of just what AMD have done to improve the performance and efficiency of Barcelona over its predecessors:

Independent dynamic core technology - In current multi-core CPUs, power saving technology is applied broadly across all cores on the processor.  In other words, if one core on the die is working hard, the entire CPU will be clocked to its highest operating frequency.  With Barcelona, each of the four cores on the CPU can be clocked independently of the others to improve power savings (and thus heat output) - For example, if you're running one intensive application which only utilises a single core, this core will be clocked at full speed while the other three cores will idle in their lowest state of power consumption.

CoolCore technology - Again, this technology is all about increased power savings and better power management, and stands for AMDs finer controls over providing power to transistors within the core.  In other words, Barcelona has far more control with regard to shutting down parts of the CPU core to save power when they are not required - For example, floating-point units and the like can be switched off when they aren't in use.

Dual Dynamic Power Management - Quite simply, this feature allows for both the CPU cores and the on-die memory controller to have their voltages controlled separately, again allowing for potential power savings by adjusting voltages dependant on the workload of the memory controller and CPU cores themselves when compared to Barcelona's predecessors, which had the voltages for both CPU cores and memory controller tied together.

Wide floating-point accelerator - As per Intel's Core 2-based CPUs, Barcelona features a 128-bit wide floating-point pipeline, doubled from the 64-bit pipeline found in the original K8 architecture.  This should, as you might hazard a guess, improve performance when handling floating-point data and calculations.

Memory optimiser technology - We'll talk about this a little more later, but by way of a basic outline this technology is aimed at making significant improvements to the efficiency of AMD's on-die DDR2 memory controller via changes to both memory access and CPU core utilisation.  AMD's belief is that this technology can increase the memory bandwidth available to the system by as much as 50%.

Balanced Smart Cache - The main emphasis of this bullet point is the fact that Barcelona CPUs contain a dedicated Level 2 cache for each core on the processor, unlike Intel's current offerings which operate using a shared Level 2 cache across all its cores.  This should give AMD's parts a leg-up with regard to performance.

Rapid Virtualisation Indexing - Again, we'll talk a little more about this later on, but in short AMD have invested plenty of time and technology with Barcelona in improving performance when running virtual machines, with virtualisation looking to become a killer application on servers in the next few years.



 

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